The present invention relates to phase-locked loops and, in particular, to a phase-locked loop having a filter leakage cancellation circuit.
Phase-locked loops (PLLs) are used in integrated circuits, such as application specific integrated circuits (ASICs), for clock synchronization and for recovery of serial data streams. A typical PLL includes a phase/frequency detector, a charge pump, a loop filter, a voltage controlled oscillator (VCO) and a frequency divider. The VCO generates a clock signal with a phase and frequency that is a function of the voltage applied to the oscillator. The phase/frequency detector detects a phase difference between the VCO output and the input signal. The phase/frequency detector generates a phase control signal as a function of the difference and applies the phase control signal to the charge pump, which increases or decreases the voltage across the loop filter. This voltage is applied to the VCO for controlling the oscillation frequency and phase.
In many cases, the loop filter cannot be integrated with the PLL on the same integrated circuit, but rather must be implemented with discreet components "off-chip". There are several reasons for implementing the loop filter with discreet components off-chip. For example, a particular application may require tight control of the resistor and capacitor values in the filter, which can be achieved with discrete components. Also, the range of required resistor and capacitor values may be large depending upon the application. In some applications, the capacitor value may be so large that the capacitor would consume excessive on-chip silicon area. Unfortunately, a significant problem results when the loop filter is brought off-chip. The loop filter is coupled to an external pin on the integrated circuit. The integrated circuit typically includes an associated electrostatic discharge (ESD) protection device coupled to the pin, which tends to leak a trickle of current from the filter capacitor. When the PLL has locked on to the phase and frequency of the input signal, the charge leakage from the filter capacitor is restored by the charge pump upon each phase comparison made by the phase/frequency detector, such that the average voltage on the filter capacitor is constant. The frequency of phase comparisons is often a low frequency in the KHz range. The charge leakage from the filter capacitor, followed by the charge restoration at the frequency of the phase comparisons will then show up as problematic signal "spurs" in the VCO's output signal spectrum, which are offset from the VCO's frequency by the phase comparison frequency.
This problem is frequently addressed by using a differential off-chip loop filter. When this is done, and if the leakage on each leg of the differential filter is the same, then the leakage results in only a common-mode shift in the differential filter voltage. A simple feedback circuit is then used to hold the common-mode voltage of the differential filter at a fixed value. The problem with this approach is that the voltage on each leg of the differential filter is typically not the same since it is the difference between these two voltages that controls the VCO frequency. For a low-gain VCO, this difference can be substantial. The different voltages results in different leakage currents off each leg of the filter. A differential signal on the loop filter results, due to the difference in leakage currents. The frequency of this signal, as in the case of the signal-ended filter, is the phase comparison frequency, which again results in problematic signal spurs in the VCO's output signal spectrum. The use of a differential loop filter not only fails to solve the problem, but also results in additional circuit complexity and requires additional inputs and outputs to the integrated circuit.